`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date:    13:15:53 04/29/2011 
// Design Name: 
// Module Name:    VGAcontrol 
// Project Name: 
// Target Devices: 
// Tool versions: 
// Description: 
//
// Dependencies: 
//
// Revision: 
// Revision 0.01 - File Created
// Additional Comments: 
//
//////////////////////////////////////////////////////////////////////////////////
 module vga_controller_640_60 (	vgadisp1,
											vgadisp2,
											vgadisp3,
											vgadisp4,
											enable1,
											enable2,
											enable3,
											X1,
											Y1,
											X2,
											Y2,
											X3,
											Y3,
											X4,
											Y4,
											hcounter, 
											vcounter,
											blank);
	
	output reg vgadisp1,vgadisp2,vgadisp3,vgadisp4;
	input enable1,enable2,enable3;
	input [10:0] X1,Y1,X2,Y2,X3,Y3,X4,Y4;

	input blank;
	input  [10:0] hcounter, vcounter;
	
	
	
	always @(*) begin

if (enable1==1) begin
//	if(vcounter>=217 && vcounter< 243) begin
//		if (hcounter >= 280 && hcounter < (328)) begin
			vgadisp1= ~blank && (hcounter>=X1 && hcounter<=40+X1 && vcounter>=Y1 && vcounter<=Y1+40);
//		end
//	end
end
		
if (enable2==1) begin
//	if(vcounter>=317 && vcounter< 343) begin
	//		if (hcounter >= 280 && hcounter < (328)) begin
				vgadisp2= ~blank && (hcounter>=X2 && hcounter<=X2+40 && vcounter>=Y2 && vcounter<=40+Y2);	
	//		end		
//	end
end	



if (enable3==1) begin
//	if(vcounter>=417 && vcounter< 443) begin
	//		if (hcounter >= 280 && hcounter < (328)) begin
				vgadisp3 = ~blank &&	(hcounter>= X3 && hcounter<=20 + X3 && vcounter>=Y3 && vcounter<=20+Y3);	
		//	end		
	//	end
end	
		


//if(vcounter>=417 && vcounter< 443) begin
	//if (hcounter >= 280 && hcounter < (328)) begin
		vgadisp4 = ~blank &&	(hcounter>= X4 && hcounter<=40 + X4 && vcounter>=Y4 && vcounter<=40+Y4);	
//	end		
//end

	end
	
endmodule
